Issue and Limit

Highly value-added digital system by increasing bit density

Scaling down of CMOS device for higher bit density in binary logic
(dominates hardware since 1960)

Power scaling limits
(will be ended by 2020)

Scaling down of CMOS device for higher bit density in binary logic
(dominates hardware since 1960)

Fundamental limitation

# of bits < # of gates
(transistors and interconnections)

Needs of New Technology

“Cycle” of semiconductor paradigm